White Papers

Electrical & Wire Harness Design

Electrical Wiring Interconnect Systems (EWIS) Requirements: The Business Challenge

A series of fatal aircraft accidents between 1996 and 1999 focused regulators on wiring-related failures, resulting in the creation of the Electrical Wiring Interconnect Systems (EWIS) requirements, FAR... View White Paper

Managing Electrical Complexity with a Platform Level Approach and Systems Engineering

In this competitive and challenging environment, thought-leaders are recommending a shift to systems engineering. Using a systems engineering approach could help OEMs maintain product quality, reduce costs,... View White Paper

Ten Ways to Make Your Wiring and Harness Design Faster and Better

Electrical design is getting more complicated - the electrics on even the "simplest" machines are sometimes beyond what the big car makers were doing 25 years back with big engineering teams and... View White Paper

Advanced EDS Design Tools Pave the Way for a Transition to Electric Vehicles

Electric vehicle platforms bring with them a host of new challenges for designers. This white paper will explore how issues range from battery placement to electrical distribution to eliminating crosstalk... View White Paper

Wire Harness Manufacturing Process Management

Wire harnesses are vital components within modern transportation platforms such as aircraft and automobiles because they distribute power and signals between the various devices that deliver electrical... View White Paper

What Race Car Teams Can Learn from Passenger Car Designers

Racing design lags behind its peers in the commodity automobile industry in some key respects, particularly in the realm of electrical design. This paper explains how today’s automated ECAD tools,... View White Paper

Electronic System Level Design

Vista Virtual Prototyping

Vista Virtual Prototyping provides an early, abstract functional model of the hardware to software engineers even before the hardware design is implemented in RTL. It can run software on embedded processor... View White Paper

Embedded System Power Consumption: A Software or Hardware Issue?

The power consumption of devices and the issues around designing for low power are hot topics at this time. This paper looks at the issues from a system-wide perspective and gives guidance on design strategies... View White Paper

Stepwise Refinement and Reuse: The Key to ESL

In this paper we will illustrate the essential elements of a five step refinement flow. The first four steps in the flow have been realized in TSMC’s Reference Flow 11 and work is ongoing for reference... View White Paper

Hardware-Aware Virtual Prototyping

Hardware-aware virtual prototyping is the best way to optimize system performance, power consumption, and cost and enable concurrent HW/SW development. Using a multi-core design, this paper demonstrates... View White Paper

Why You Should Optimize Power at the ESL

The opportunities for optimizing a design for power are greatest at the architectural level of abstraction, where the design architecture is determined. The further a design moves downstream the less effective... View White Paper

Realizing ESL with Scalable Transaction Level Models

The OSCI TLM2 standard, scalable transaction-level models, and a methodology built around the Vista™ Model Builder technology overcome the three prevalent concerns about electronic system level design.... View White Paper

Embedded Software

How effective power management increases the lifetime operation of portable medical devices

To enable remote patient care and provide increased mobility in hospital settings portable medical devices, Personal Area Networks (PANs), and home health systems are seeing a significant increase in investment... View White Paper

Internet of things (IoT) design considerations for embedded connected devices

Embedded connectivity has been around since the early days of M2M. But what is new are the many complexities and emerging standards embedded system developers need to know if they are to design the latest... View White Paper

Selecting an operating system for embedded applications

It seems these days, just about every embedded system has some type of operating system. And there are more options today as to which OS to choose. Is open source your best choice? What about a free RTOS?... View White Paper

Debugging Performance Issues with Qt® based UI Applications

Interactive user interfaces (UI) are fast becoming a basic requirement in many embedded applications and Qt® is a popular cross-platform application and framework to help develop such compelling UIs.... View White Paper

Power Management Techniques for Smart Grid Devices

Energy efficiency is a top concern among developers building connected devices for the smart grid. Initially, the application-centric approach to building a device was used. But today, with sophisticated... View White Paper

Smart Grid Security: Communication and Security Capabilities at the OS Level

Smart energy is an all-inclusive term that refers to upgrading the energy grid so it can support bi-directional flow of energy and data. Such an endeavor involves adding connectivity, communication, and... View White Paper

FPGA

When Spreadsheets Aren’t Enough

Engineers writing embedded software for 32-bit microcontrollers at the STMicroelectronics campus in Agrate Brianza, Italy used Mentor Graphics' requirements tracing tool, ReqTracer, on a recent project.... View White Paper

FPGA Verification with Assertions: Why Bother? A Painless and Easy Step-by-Step Approach to Adopting Assertions

This paper provides a practical, easy, step-by- step set of instructions on how to add assertions to your RTL design. By following the simple guidelines provided in this paper you will benefit by cutting... View White Paper

Using Assertions to Satisfy Elemental Analysis

This paper discusses DO-254 and what it requires for verification (including advanced methods for DAL A/B designs), explains the original intent of Elemental Analysis, the way it is typically satisfied... View White Paper

Understanding electronic IP: common issues and how to find them

Using IP blocks in designs requiring DO-254 compliance is becoming more popular as a way to reduce costs and schedules. However, the use of IP comes with its own problems and pitfalls. A good methodology... View White Paper

Best practice development processes for medical device FPGAs

For FPGA developers working on designs for medical devices, one approach to dealing with regulatory uncertainty is to borrow heavily from design assurance processes in other safety-critical industries,... View White Paper

Understanding DO-254 and Solutions to Facilitate Compliance

RTCA/DO-254 (also known as DO-254 in the US or ED-80 in Europe) provides guidelines to facilitate requirements-based design of airborne electronic hardware. Now mandated by the US Federal Aviation Association... View White Paper

Functional Verification

Verification Planning and Requirement Tracking for Analog Design

Verifying designs to meet all specifications across all process corners has become an intractable problem from the perspective of debugging, managing, tracking, and meeting verification goals. Implementing... View White Paper

From Simulation to Emulation – A Fully Reusable UVM Framework

This paper introduces an acceleration-ready UVM framework and explains why it is needed, how to create it, and what its benefits are. By following the principles presented here, users will be able to write... View White Paper

Assertion-Based Emulation Using Veloce

This paper describes the assertion-based verification approach along with its benefits and uses. It further explains the advantages of emulation, especially for very large and complex SoCs, and how Veloce®... View White Paper

Equivalence Validation of Analog Behavioral Models

This paper presents essential components of an equivalence validation environment and commonly used methods to apply it effectively.To achieve good verification coverage on mixed signal SoCs, abstract models... View White Paper

Interpreting UPF for a Mixed-Signal Design Under Test

This paper describes a methodology (as implemented in the Mentor Graphics Questa ADMS mixed-signal simulator) for interpreting the Unified Power Format (UPF) for analog mixed-signal designs coded in Verilog-AMS,... View White Paper

Event-Driven (RN) Modeling for AMS Circuits

Learn why modeling AMS components using RN modeling techniques in order to significantly increase the simulation speed requires having all of the design written in digital and using RN modeling techniques. View White Paper

Intellectual Property

The Integrated IP Subsystem: A Converging SoC Solution

The consumer device market is witnessing incredible market space convergence between mobile handheld, automotive, and home electronics. IP vendors, engineers, and system design engineers face a multitude... View White Paper

The Evolution in Disk-Drive Storage: How Consumer Electronic Storage Devices will Drive Future Growth

The new CE-ATAinterface standard for handheld devices and consumer electronic portables is quickly emerging as the most promising storage interface standard today. Replacing SATA, CE-ATA addresses many... View White Paper

Ptolemy-Oriented Structural, Reconfigurable, and Heterogeneous Hardware Design, Verification and Synthesis

This paper investigates the suitability of Ptolemy II platform for current complex hardware systems design, modeling, simulation, verification, synthesis and implementation. Systems complexity, lower process... View White Paper

Analog IP Migration Using Design Knowledge Extraction

Demonstrated in this paper is a technique for automatic circuit resizing between different technologies. It relies on design knowledge extraction, which renders it very fast compared to full optimization... View White Paper

When does it make sense to design for reuse?

Design Reuse is part of the solution to closing the widening gap between what is possible to implement in Silicon and what is practical to design with current design methodologies and tools. The question... View White Paper

IP Reuse Creation for System-on-a-Chip Design

The never ending increase of silicon capacity available to system and IC designers, as predicted by Moore's Law, brings on a cyclical crisis in design methodology and engineering productivity generating... View White Paper

IC Design

Verification Planning and Requirement Tracking for Analog Design

A Novel Approach to Dummy Fill for Analog Designs Using Calibre SmartFill

With small geometry silicon processes, additional nonfunctional geometric structures are required to maintain layer planarity during the chemical/mechanical polishing (CMP) phase of processing. The automated... View White Paper

Pattern Matching: Blueprints for Further Success

Design patterns have a wide variety of applications in the design, verification and test flows of IC development. From significantly reducing rule deck complexity to simplifying the task of avoiding known... View White Paper

Single Kernel Electro-Thermal IC Simulator

This paper investigates a new, highly-accurate and high-performing electro-thermal effects simulation method and tools. It describes the extension of an analog electrical simulator to handle the electrical... View White Paper

High-Performance Analog and RF Circuit Simulation using the Analog FastSPICE Platform at Columbia University

The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes.... View White Paper

A Methodology for High-Speed Nanometer Transceiver Verification, Validation, and Characterization

The design and verification of high-speed transceivers at the leading-edge process nodes (20 nm and below) present design teams with tremendous challenges. These high data rate (up to 28.1 Gbps) transceivers... View White Paper

IC Manufacturing

Pattern Matching: Blueprints for Further Success

An Automated Resource Management System to Improve Production Tapeout Turn-Around Time

In today’s semiconductor industry, both the pure-play and independent device manufacturer (IDM) foundries are constantly and rigorously competing for market share. A key feature in their success is... View White Paper

The Impact of 14-nm Photomask Uncertainties on Computational Lithography Solutions

Computational lithography solutions rely upon accurate process models to faithfully represent the imaging system output for a defined set of process and design inputs. These models, in turn, rely upon the... View White Paper

Mask data preparation flow for advanced technology nodes

The trend to reduce critical features dimension has dramatically increased design file size. Design tape–out flows at the 28 nm technology node handle post-OPC data files that reach hundreds of gigabytes.... View White Paper

Roadmap to sub-nanometer OPC model accuracy

OPC models describe the entire patterning process, including photomask, optics, resist, and etch as a set of separately characterized modules. It is difficult, however, to definitively calibrate the optics... View White Paper

Weighting evaluation for improving OPC model quality by using advanced SEM-Contours from wafer and mask

In this study, the weighing function of Calibre ContourCal, was evaluated using a familiar OPC data set used in previous published research. We discuss the quality of OPC model by applying different weighting... View White Paper

Mechanical Analysis

How to Optimize PCB Thermal Design for Complex Network and Telecommunications Equipment

Networking and telecom systems need to run 24/7, and continually increasing computing requirements and network traffic are increasing power densities in enclosures and on boards. These demands require ever-more... View White Paper

How to Predict Component Temperatures for Complex Network and Telecommunications Equipment

The insides of network and telecom equipment consist of a complex assembly of many solid objects (PCBs, electronics packages and devices, cabling, fans, and heatsinks, for example). Airflow is confined... View White Paper

Identifying Optimal Thermal Designs for Network and Telecommunications Equipment

Networking and telecom systems need to run 24/7, and an unreliable system can expose the system supplier to significant warranty, recall, and reputation costs. More functionality and higher performing electronic... View White Paper

10 Myths of Computational Fluid Dynamics

We debunk 10 popular excuses to avoid using general-purpose CFD software to solve Navier-Stokes equations, and how it can improve product design in everything from swimming pools to production printing... View White Paper

7 Key Considerations For Effective Chip-Package Thermal Co-Design

Chip-package co-design is important for several reasons. Designing a large high power die, e.g. a System-on-Chip (SoC) without considering how to get the heat out is likely to lead to problems later on,... View White Paper

Thermal Simulation and Characterization Optimizes LEDs for Automotive Applications

This paper addresses methods that can help to achieve the best-in-class thermal management for the lighting industry. We discuss selecting and measuring the thermal characteristics of LEDs, choosing the... View White Paper

PCB Manufacturing, Assembly & Test

Lean NPI: The Successful Way to Build PCBs Globally

The Valor Lean NPI flow, featuring Xpedition PCB Layout, Valor NPI for manufacturing rule management and Valor Process Preparation for comprehensive manufacturing process setup, uniquely supports the concept... View White Paper

Taking Total Control of Materials with Valor

This white paper explains exactly how the Valor solution works to enhance ERP capability, eliminate needless material costs, and promote flexibility and agility of electronics manufacturing in line with... View White Paper

Effectively Manage Material Obsolescence to Avoid Costly Surprises

This paper describes the solution that allows complete management and control for companies to optimize their business and their performance on commitment to customers, specifically with respect to effective... View White Paper

How to Better Manage the Complexity of LED Binning with Valor

The electronics industry is experiencing an increase in the use of Light Emitting Diodes (LEDs) in a growing number of products. The lower power consumption, smaller size and longer life make LEDs an attractive... View White Paper

Best Practice NPI: Improve Your Return on Investment

This white paper reviews feedback from customers who have implemented the Best Practice NPI Flow. Identify the benefits of an effective NPI Flow and learn how to optimize for the best Return On Investment... View White Paper

Manage Your Data Flow to Gain Visibility into Production Operations

The Valor Information Highway: There are many complex elements that contribute together to make the shop-floor effectively. View White Paper

PCB Design

Systems Design Barriers Delay New Product Development

Although PCB tools have evolved to become tightly integrated, sharing common databases across the design, and have introduced automation to eliminate human error, hardware systems design has remained much... View White Paper

Path Finding Across IC-Package-PCB

Many factors and challenges come into play when considering a true cross-domain co-design platform to support modern day design requirements. This paper discusses the capabilities that should be considered... View White Paper

First Pass Electrically-correct PCB Design Using HyperLynx For Electrical Sign Off

Nearly all PCB designs have some sorts of electrical performance flaws when first created. Finding and quantifying the severity of these design flaws remains a big challenge for design teams. ... View White Paper

The Jitter-Noise Duality and Anatomy of an Eye Diagram

Within this paper we discuss the proper way of finding BER, as a function of the sample time and voltage, explain the effect of jitter introduced at the driver and receiver on the eye diagram and compare... View White Paper

Computation of Time Domain Impedance Profile from S-Parameters: Challenges and Methods

When computing time-domain impedance profile from measured S-parameters, we often face some problems caused by low quality of sampled S-parameters, such as insufficient resolution, band limiting, noise... View White Paper

Correlating Measurement and Simulation: Analysis Anchored to Reality

One of the most frequent questions asked about Mentor Graphics HyperLynx simulation and analysis tool is “How accurate is simulation?” That is certainly a fair question. Just how much can you... View White Paper

Silicon Test & Yield Analysis

Improve Failure Analysis Success Rate with Layout-Aware Diagnosis

In this whitepaper, we explore how a layout- aware diagnosis is a powerful tool for both failure analysis engineers, who find the root cause of a particular failing die, and for yield engineers, who need... View White Paper

Divide and Conquer: Hierarchical DFT for SoC Designs

Large System on Chip (SoC) designs present many challenges to all design disciplines, including design-for-test (DFT). By taking a divide-and-conquer approach to test, significant savings in tool runtime... View White Paper

Root Cause Deconvolution - The Next Step in Diagnosis Resolution Improvement

Scan logic diagnosis turns failing test cycles into valuable data and is an established method for digital semiconductor defect localization. The advent of layout-aware scan diagnosis represented a dramatic... View White Paper

Plug-and-Play Test Strategy for 3D ICs

As the industry transitions to 3D ICs, new test strategies are being developed to meet to two 3D IC test goals: improving the pre-packaged test quality and establishing new tests between the stacked die.... View White Paper

Tessent TestKompress Cell-Aware ATPG

Tessent Cell-Aware ATPG is a transistor-level ATPG-based test methodology that achieves significant quality and efficiency improvements by directly targeting specific shorts; opens and transistor defects... View White Paper

Improve Logic Test with a Hybrid ATPG/BIST Solution

Two test strategies are used to test virtually all IC logic—automatic test pattern generation (ATPG) with test pattern compression, and logic built-in self-test (BIST). For many years, there was a... View White Paper

System Modeling

Time-Varying Modeling of Electric Vehicle Chargers

Nonlinear loads, such as those used in electric vehicle chargers, introduce power quality issues within distributions that can have detrimental effects on system assets. This paper presents shows how a... View White Paper

Forestalling "11th Hour" Design Problems in System Design

This paper discusses ways that model-based development lays the groundwork for an integrated design flow that addresses the complexity challenge once and for all. Thanks to recent advances in modeling languages... View White Paper

The "Art" of Creating Simulation Models

When employed at the start of the design process, simulation provides an environment in which a system can be tuned, can be optimized, and critical insights can be gained. Then, during the verification... View White Paper

A VHDL-AMS Fuel Cell Model for Mechatronic System Analysis

Modeling is a useful technique that allows important variables to be parameterized and provides visibility to the key factors that drive performance. This white paper describes how to apply an electrochemical... View White Paper

Reduce Project Schedules and Increase Quality using Model Driven Development

This paper shows how Model Driven Development can address common challenges in the system design, verification & testing of complex systems and systems of systems. Model Driven Development and virtual... View White Paper

Communicate, eXecute, and Translate - Oh My! - the Power of xtUML and Virtual Platforms

This paper describes a model-driven development approach that leverages modeling efforts to validate functionality and transform high level models into forms that are useful at the next development step.... View White Paper