Mentor Graphics Training
We offer training courses for key Mentor Graphics products and technologies, available in our training centers around the world, at your site, or online.
On-Demand Training (Self-Paced)
Take Mentor Graphics training when you need it, using your own computer. Start your course within minutes of completing your registration. Learn more about on-demand training
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CES for Expedition PCB
Using CES for Expedition®, learn to quickly define and refine design constraints accessible from many Mentor Graphics PCB design systems, to improve design accuracy. |
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DxDesigner for Expedition PCB Flow
This course will develop your skills in the DxDesigner environment, enabling you to clearly and accurately draw correct-by-design schematics. |
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Expedition PCB Advanced
This course will help you understand many of the advanced layout options available for Expedition PCB, including many of the purchasable utilities. |
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Expedition PCB Introduction
In this course, you’ll gain hands-on experience in integrating a source schematic, setting up for layout, placing and routing the board, and outputting the fabrication data. |
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HyperLynx SI Analysis Basics (on-demand)
This self-paced, on-demand course will give you all the basic information needed to use HyperLynx SI to analyze signal integrity, timing, crosstalk and EMI in pre- and post- layout stages of the design process. |
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Library Manager for DxDesigner to Expedition PCB Flow
In this course, you’ll use Library Manager for DxDesigner to manage all aspects of the logical and physical part data required in complex PCB systems. This provides designers and librarians with an easy way to simplify part selection and design choices, and manage a central library. |
Instructor-Led Training
Mentor's instructor-led training is available in our training centers or through our Live Online remote program. Private training, at your site or ours, is available by request. Request private training
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CES for Expedition PCB
Using CES for Expedition®, learn to quickly define and refine design constraints accessible from many Mentor Graphics PCB design systems, to improve design accuracy. More upcoming dates (11 total)
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7/16/14 | Seoul, KR | ||||||||||||||||||||||
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Calibre Fundamentals: Writing DRC/LVS Rules
This course will teach you to effectively write and maintain Calibre nmDRC and nmLVS rule decks for your semiconductor processes. In this class, you will extensively study the Standard Verification Rule Format (SVRF) language used in Calibre rule decks. The lecture modules will guide you through the various concepts underlying state-of-the-art layout verification techniques and specific aspects of the Calibre toolset. Hands-on lab exercises will reinforce lecture topics and provide you with rule writing experience under the guidance of our industry expert instructors. More upcoming dates (8 total)
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7/8/14 | Singapore, SG | ||||||||||||||||||||||
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DxDesigner for Expedition PCB Flow
This course will develop your skills in the DxDesigner environment, enabling you to clearly and accurately draw correct-by-design schematics. More upcoming dates (11 total)
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7/14/14 | Longmont, CO | ||||||||||||||||||||||
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DxDesigner for PADS Flow
Using the DxDesigner tools suite, you will gain proficiency in project management with Dashboard, schematic capture with DxDesigner, part selection using DxDataBook™, and much more. You will also learn how to prepare your final schematic for interfacing with the Mentor Graphics® PADS® Layout tool. More upcoming dates (8 total)
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8/4/14 | Marlborough, MA | ||||||||||||||||||||||
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Expedition PCB Advanced
This course will help you understand many of the advanced layout options available for Expedition PCB, including many of the purchasable utilities. More upcoming dates (6 total)
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7/22/14 | Seoul, KR | ||||||||||||||||||||||
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Expedition PCB Introduction
In this course, you’ll gain hands-on experience in integrating a source schematic, setting up for layout, placing and routing the board, and outputting the fabrication data. More upcoming dates (11 total)
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7/8/14 | Fremont, CA | ||||||||||||||||||||||
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FloTHERM
This course will teach you how to use the FloTHERM thermal analysis software. Complete with instruction and tutorial exercises, the training guides you through all aspects of model building, using SmartParts and libraries, importing data from MCAD and EDA software, sequential optimization and visualization of results. More upcoming dates (11 total)
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7/16/14 | Hampton Court, GB | ||||||||||||||||||||||
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FloVENT Introduction
This course is designed to familiarize new and existing users with FloVENT®. Attending this training course will take you quickly up the FloVENT learning curve and help you become immediately productive in using the software. More upcoming dates (3 total)
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7/29/14 | Meudon, FR | ||||||||||||||||||||||
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I/O Designer
This course teaches you how to manage the data and monitor the changes between the two design flows while maintaining consistency. More upcoming dates (3 total)
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7/22/14 | Munich, DE | ||||||||||||||||||||||
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PADS Layout
This course will teach you the workflow of laying out a printed circuit board using the latest version of Mentor Graphics PADS Layout. You will be guided through the steps necessary to design a printed circuit board. Course highlights include creating physical components, importing netlists, adding/updating parts, routing connections, generating reports and Gerber information. More upcoming dates (7 total)
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7/15/14 | Live online | ||||||||||||||||||||||
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PADS Logic
This course teaches you the workflow of creating a schematic design using the latest version of Mentor Graphics PADS® Logic. You will be guided through the steps necessary to capture schematics. More upcoming dates (4 total)
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8/4/14 | Live online | ||||||||||||||||||||||
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SystemVerilog Universal Verification Methodology
This 4-day course is for engineers who are interested in developing SystemVerilog verification environments using the Universal Verification Methodology (UVM). More upcoming dates (9 total)
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7/7/14 | Bangalore, IN | ||||||||||||||||||||||
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SystemVerilog for Verification
This intensive, practical course is intended for Verification Engineers interested in the latest verification enhancements to SystemVerilog. While many engineers may have extensive verification experience this course will introduce best-practice usage of SystemVerilog features like Object Oriented programming, Constrained Randomization and Functional Coverage. More upcoming dates (9 total)
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7/8/14 | Bangalore, IN | ||||||||||||||||||||||
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Tessent MemoryBIST and LogicBIST
This course will help you understand how to implement DFT for memory and logic test. You will be introduced to Tessent™ technology and automation tools, building upon a recommended flow that a hardware engineer adding Built-In Self-Test (BIST) should follow. The lecture/lab format of the class gives you a conceptual understanding of how BIST circuitry for random logic and memories can be automatically generated and inserted into a circuit. More upcoming dates (3 total)
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8/6/14 | Fremont, CA | ||||||||||||||||||||||
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Tessent Scan and ATPG
The Tessent®: Scan and ATPG course will drive the development of your skills and knowledge in scan and ATPG design processes utilizing the Tessent Scan point tool, Tessent FastScan™, Tessent TestKompress®, and the Tessent point tool DFTVisualizer. More upcoming dates (9 total)
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7/8/14 | Herzliya, IL |