OR

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A connective in logic which yields true if any one of a sequence conditions is true, and false if all conditions are false. In formal logic, the term disjunction (or, more specifically, inclusive disjunction) is commonly used to describe the OR operator. A OR B is denoted A v B (Mendelson 1997, p. 13), A|B, A+B (Simpson 1987, p. 539), or A union B (Simpson 1987, p. 539). The circuit diagram symbol for an OR gate is illustrated above.

The symbol  v derives from the first letter of the Latin word "vel," meaning "or," and the expression A v B is voiced either "A or B" or "A vel B." The way to distinguish the similar symbols  ^ (AND) and  v (OR) is to note that the symbol for AND is oriented in the same direction as the capital letter 'A." The OR operation is implemented in the Wolfram Language as Or[A, B, ...].

The OR operation can be written in terms of NOT and AND as

 A v B=!(!A ^ !B)

(Mendelson 1997, p. 26).

The binary OR operator has the following truth table (Carnap 1958, p. 10; Simpson 1987, p. 542; Mendelson 1997, p. 13).

ABA v B
TTT
TFT
FTT
FFF

A product of ORs is called a disjunction and is denoted

  v _(k=1)^nA_k.

For example, the truth table for the ternary OR operator is shown below (Simpson 1987, p. 543).

ABCA v B v C
TTTT
TTFT
TFTT
TFFT
FTTT
FTFT
FFTT
FFFF
BitOr

A bitwise version of OR can also be defined that performs a bitwise OR on the binary digits of two numbers x and y and then converts the resulting binary number back to decimal. Bitwise OR is sometimes denoted A∥B and is implemented in the Wolfram Language as BitOr[n1, n2, ...]. The illustration above plots the bitwise OR of the array of numbers from -31 to 31 (Wolfram 2002, p. 871).

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